Server Memory Specs: A Short GuideBecause JEDEC Already Did the Work
Unlike CPUs and HDDs, server memory is defined by a standards body — JEDEC. Samsung, SK Hynix, and Micron all build to the same spec, which means modules from different manufacturers are interchangeable at the same spec point. A handful of fields fully describe any module. This page is a clean reference for what each one means.
The six specs that define a module
- Generation — DDR3 / DDR4 / DDR5 — determines voltage, speed range, and socket compatibility
- Form factor — RDIMM / LRDIMM / UDIMM / MRDIMM — the buffer type, which determines capacity ceiling and latency profile
- Capacity — 16 GB / 32 GB / 64 GB / 128 GB — total usable capacity per module
- Speed — Expressed in MT/s (megatransfers per second). CPU memory controller determines the ceiling
- ECC support — Yes / No — error-correcting code. Required for any production server workload
- Voltage — 1.5 V (DDR3) / 1.35 V (DDR3L) / 1.2 V (DDR4) / 1.1 V (DDR5)
These six fields plus a manufacturer name fully identify any server DIMM. Everything else — die density, chip width, rank — is secondary detail that only matters in specific high-capacity or compatibility edge cases.
Generation
| Generation | Years active | Voltage | Low-voltage variant | Typical speed range | Typical capacity range |
|---|---|---|---|---|---|
| DDR3 | 2007–2018 | 1.5 V | DDR3L — 1.35 V | 1066–1866 MT/s | 4–32 GB per module |
| DDR4 | 2014–ongoing | 1.2 V | — | 2133–3200 MT/s | 8–128 GB per module |
| DDR5 | 2021–ongoing | 1.1 V | — | 4800–8800 MT/s | 16–256 GB per module |
DDR3 is end-of-life but still active in the secondary market. DDR4 is the current procurement mainstream. DDR5 is required for Intel Sapphire Rapids+ and AMD Genoa+ platforms.
Form factors
RDIMM — Registered DIMM
A register buffer sits between the memory controller and the DRAM chips, reducing the electrical load on the controller. Standard for dual-socket and higher-density server configurations. The buffer adds 1–2 clock cycles of latency — not measurable in production workloads. RDIMMs are the default assumption for any enterprise server procurement.
LRDIMM — Load-Reduced DIMM
Adds a full isolation buffer (not just a register), which reduces the electrical load further and enables more DRAM chips per module. This is how you get 128 GB+ modules — almost all high-capacity single DIMMs are LRDIMM. The trade-off is higher latency than RDIMM. Use LRDIMM when you need maximum memory density per server; use RDIMM when latency matters more than raw capacity.
UDIMM — Unbuffered DIMM
No buffer. The memory controller connects directly to the DRAM chips. Lowest latency and lowest cost, but a lower capacity ceiling and reduced signal integrity at higher speeds. Found in single-socket workstations, edge appliances, and budget servers. Not supported in dual-socket configurations.
MRDIMM — Multiplexed Rank DIMM
A DDR5-era standard that multiplexes two ranks to effectively double bandwidth per channel. Intel Xeon 6 (Granite Rapids) supports MRDIMMs natively. Still emerging as of 2024–25 — adoption is early and module availability is limited. Worth knowing the name but not yet a standard procurement spec.
SODIMM — Small Outline DIMM
Physically smaller than a standard DIMM — used in laptops and compact embedded systems. Appears in servers only in edge appliances, micro-servers, and some 1U platforms. Not a standard enterprise server form factor.
Speed bins
Memory speed is expressed in MT/s (megatransfers per second). More MT/s = more bandwidth per channel, which matters for memory-bandwidth-bound workloads (in-memory databases, HPC, AI inference). The CPU memory controller sets the ceiling — a faster module installed in a slower controller runs at the controller’s max, not the module’s rated speed. Always match module speed to the platform’s supported speed bins to avoid leaving bandwidth on the table.
| Generation | Common speed bins (MT/s) |
|---|---|
| DDR3 | 1066 · 1333 · 1600 · 1866 |
| DDR4 | 2133 · 2400 · 2666 · 2933 · 3200 |
| DDR5 | 4800 · 5200 · 5600 · 6000 · 6400 · 6800 · 7200 · 8800 |
DDR4-3200 and DDR5-4800 are the typical base speeds for current-generation platforms. Higher DDR5 speeds (6400+) require platform validation — check your CPU’s QVL.
Rank, chip width, and die density
These specs are mostly abstracted away from buyers, but they surface in compatibility sheets and occasionally affect pricing.
| Spec | What it means | When it matters |
|---|---|---|
| Rank (1R / 2R / 4R) | How many independent groups of chips the memory controller addresses on one module. Single-rank (1R) has lower load; dual-rank (2R) enables interleaving for higher throughput. | High-density configs: some platforms limit total ranks per channel, so a 4-rank LRDIMM may not be compatible where a 2-rank module is. |
| Chip width (×4 / ×8 / ×16) | How many bits each DRAM chip contributes per access. ×4 chips need more chips to fill a 64-bit bus but give finer ECC granularity. | ×4 chips are required for Advanced ECC (Chipkill/SDDC) on some server platforms. Check the platform QVL if running demanding RAS configs. |
| Die density | The capacity of each individual DRAM chip (e.g. 8Gbit, 16Gbit). Higher die density enables higher module capacity with the same chip count. | Mostly invisible to buyers. Affects whether a new-generation high-density module is supported on older platforms with density limits. |
ECC and why it matters
ECC (Error-Correcting Code) memory detects and corrects single-bit memory errors silently in hardware — no OS involvement, no visible event. It also detects (but cannot correct) multi-bit errors and can flag them before they corrupt data. Required for any production server workload. Non-ECC memory is not a real trade-off in enterprise contexts — the cost difference is negligible and the risk is not. If a spec sheet doesn’t explicitly say ECC, assume it doesn’t have it. All RDIMM and LRDIMM modules are ECC by definition.
Reading a real part number
Samsung M393A2K40DB3-CWE — DDR4 RDIMM 16 GB 3200
| Segment | Value | Meaning |
|---|---|---|
| Product family | M393 | Samsung server DRAM, DDR4 RDIMM (M=Memory, 39=DDR4 server, 3=RDIMM) |
| Die generation | A | Internal die revision letter — increments with each process shrink |
| Configuration | 2K40 | Capacity and rank encoding (internal Samsung code — 16 GB 2Rx8 in this case) |
| PCB revision | DB3 | Board design iteration |
| Speed bin | CWE | C = DDR4-3200, W = 1.2 V, E = ECC / unbuffered variant code |
SK Hynix HMAA4GR7AJR8N-XN — DDR4 RDIMM 32 GB 3200
| Segment | Value | Meaning |
|---|---|---|
| Brand | H | SK Hynix |
| Product type | MA | DRAM module (MA = DDR4 server module prefix) |
| Die generation | A | Internal die revision |
| Die density | 4G | 4 Gbit per DRAM chip |
| Form factor | R | RDIMM |
| Generation | 7 | DDR4 (Hynix internal generation code) |
| Configuration | AJR8N | Rank, width, and internal config code |
| Speed bin | XN | XN = DDR4-3200 |
Micron MTC20F2085S1RC56BR — DDR5 RDIMM
| Segment | Value | Meaning |
|---|---|---|
| Brand | MT | Micron Technology |
| Product type | C | DRAM component / module type indicator |
| Generation | 20 | DDR5 (Micron uses 20 for DDR5 module series) |
| Configuration | F2085S1R | Internal density, rank, and width encoding |
| Speed bin | C56 | DDR5-5600 |
| Revision | BR | Hardware revision |
Vendor part number schemes are partially proprietary — treat the segment breakdown as directional. The confirmed specs (capacity, speed, form factor, generation) are always on the datasheet and product label; the internal codes vary by product family.
How this connects to pricing
Because Samsung, SK Hynix, and Micron all build to the same JEDEC spec, secondary market prices for the same spec point are highly correlated across brands — typically within 5–10%. A Samsung DDR4-3200 32 GB RDIMM and a Hynix DDR4-3200 32 GB RDIMM will trade within a few dollars of each other. Brand premium in memory is real but small compared to CPUs or HDDs, where brand maps to a distinct product. The bigger price driver in memory is the spec itself: generation, capacity, and speed bin.
Browse live pricing for server memory